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AT89C51IC2解密

    深圳芯片解密研究所AT89C51IC2解密等各类IC解密、单片机解密仅限学习研究的呢个合法用途,以下是AT89C51IC2单片机基本描述及其功能特征介绍,关于AT89C51IC2解密更多合作详情以及报价请直接与我们联系:
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    AT89C51IC2 is a high performance Flash version of the 80C51 8-bit microcontrollers. It contains a 32K bytes Flash memory block for program and data.The 32K bytes Flash memory can be programmed either in parallel mode or in serial mode with the ISP capability or with software. The programming voltage is internally generated from the standard VCC pin. The AT89C51IC2 retains all features of the 80C52 with 256 bytes of internal RAM, a 10-source 4-level interrupt controller and three timer/counters. In addition, the AT89C51IC2 has a 32 kHz Subsidiary clock Oscillator, a Programmable Counter Array, an XRAM of 1024 byte, a Hardware Watchdog Timer, a Keyboard Interface, a 2-wire interface, an SPI Interface, a more versatile serial channel that facilitates multiprocessor communication (EUART) and a speed improvement mechanism (X2 mode).
  The fully static design of the AT89C51IC2 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data.The AT89C51IC2 has 2 software-selectable modes of reduced activity and 8-bit clock prescaler for further reduction in power consumption. In the Idle mode the CPU is frozen while the peripherals and the interrupt system are still operating. In the power-down mode the RAM is saved and all other functions are inoperative.
  The added features of the AT89C51IC2 make it more powerful for applications that need pulse width modulation, high speed I/O and counting capabilities such as alarms, motor control, corded phones, smart card readers.
  Features
  80C52 Compatible
  – 8051 Pin and Instruction Compatible
  – Four 8-bit I/O ports + 2 I/O 2-wire Interface (TWI) Pins
  – Three 16-bit Timer/Counters
  – 256 bytes Scratch Pad RAM
  – 10 Interrupt Sources with 4 Priority Levels
  – Dual Data Pointer
  Variable Length MOVX for Slow RAM/Peripherals
  ISP (In-System-Programming) Using Standard Vcc Power Supply
  Boot ROM Contains Low Level Flash Programming Routines and a Default Serial
  Loader
  High-speed Architecture
  – In Standard Mode:
  40 MHz (Vcc 2.7V to 5.5V, both Internal and external code execution)
  60 MHz (Vcc 4.5V to 5.5V and Internal Code execution only)
  – In X2 mode (6 Clocks/machine cycle)
  20 MHz (Vcc 2.7V to 5.5V, both Internal and external code execution)
  30 MHz (Vcc 4.5V to 5.5V and Internal Code execution only)
  – 32K Bytes On-chip Flash Program/Data Memory
  – Byte and Page (128 Bytes) Erase and Write
  – 100K Write Cycles
  On-chip 1024 Bytes Expanded RAM (XRAM)
  – Software Selectable Size (0, 256, 512, 768, 1024 Bytes)
  – 256 Bytes Selected at Reset for TS87C51RB2/RC2 Compatibility
  Keyboard Interrupt Interface on Port P1
  400-Kbits/s Multimaster 2-wire Interface
  SPI Interface (Master/Slave Mode)
  Sub-clock 32 kHz Crystal Oscillator
  8-bit clock Prescaler
  Improved X2 Mode With Independant Selection for CPU and Each Peripheral
  Programmable Counter Array 5 Channels with:
  – High Speed Output
  – Compare/Capture
  – Pulse Width Modulator
  – Watchdog Timer Capabilities
  Asynchronous Port Reset
  Full-duplex Enhanced UART
  Dedicated Baud Rate Generator for UART
  Low EMI (Inhibit ALE)
  Hardware Watchdog Timer (One-time enabled with Reset-Out)
  Power Control Modes:
  – Idle Mode
  – Power-down Mode
  – Power-Off Flag
  Power Supply:
  – 2.7 to 3.6 (3V Version)
  – 2.7 to 5.5V (5V Version)
  Temperature Ranges: Commercial (0 to +70°C) and Industrial (-40°C to +85°C)
  Packages: PLC44, VQFP44


 

[来源:芯片解密研究所] [作者:admin] [日期:09-10-10] [热度:]
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