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下面，我们将针对MC56F8014VFAE单片机的功能特征做简单介绍，供各类解密工程师及客户进行技术参考借鉴，有MC56F8014VFAE单片机解密等FREESCALE系列IC芯片解密需求者欢迎与橙盒芯片解密研究所联系咨询更多解密详情
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MC56F8014VFAE General Description
Up to 32 MIPS at 32MHz core frequency
DSP and MCU functionality in a unified,C-efficient architecture
16KB Program Flash
4KB Unified Data/Program RAM
One 5-channel PWM module
Two 4-channel 12-bit ADCs
One Serial Communication Interface (SCI) with LIN slave functionality
One Serial Peripheral Interface (SPI)
One 16-bit Quad Timer
One Inter-Integrated Circuit (I2C) Port
Computer Operating Properly (COP)/Watchdog
On-Chip Relaxation Oscillator
Integrated Power-On Reset and Low-Voltage Interrupt Module
JTAG/Enhanced On-Chip Emulation (OnCE?) for unobtrusive, real-time debugging
Up to 26 GPIO lines
32-pin LQFP Package
MC56F8014VFAE FEATURE
Digital Signal Controller Core
Efficient 16-bit 56800E family Digital Signal Controller (DSC) engine with dual Harvard architecture
As many as 32 Million Instructions Per Second (MIPS) at 32MHz core frequency
Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC)
Four 36-bit accumulators, including extension bits
Arithmetic and logic multi-bit shifter
Parallel instruction set with unique DSP addressing modes
Hardware DO and REP loops
Three internal address buses
Four internal data buses
Instruction set supports both DSP and controller functions
Controller-style addressing modes and instructions for compact code
Efficient C compiler and local variable support
Software subroutine and interrupt stack with depth limited only by memory
JTAG/EOnCE debug programming interface
Memory
Harvard architecture permits as many as three simultaneous accesses to program and data memory
Flash security and protection
On-chip memory, including a low-cost, high-volume Flash solution
— 16KB of Program Flash
— 4KB of Unified Data/Program RAM
EEPROM emulation capability
